Benchmarking IWO-based Logic Circuits for Monolithic 3D Integration
Author:
Affiliation:
1. Indian Institute of Technology,Department of Electrical Engineering,Kanpur,India
2. Technical University of Munich,TUM School of Computation, Information and Technology, Chair of AI Processor Design,Munich
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10511270/10511310/10511830.pdf?arnumber=10511830
Reference9 articles.
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2. Influence of Tungsten Doping on the Performance of Indium–Zinc–Oxide Thin-Film Transistors
3. Low-temperature processable amorphous In-W-O thin-film transistors with high mobility and stability
4. Role of Ga2O3–In2O3–ZnO channel composition on the electrical performance of thin-film transistors
5. Carrier transport in transparent oxide semiconductor with intrinsic structural randomness probed using single-crystalline InGaO3(ZnO)5 films
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1. Design-Technology Co-Optimization for Stacked Nanosheet Oxide Channel Transistors in Monolithic 3D Integrated Circuit Design;IEEE Transactions on Nanotechnology;2024
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