Tile Architecture and Hardware Implementation for Computation-in-Memory

Author:

Zahedi Mahdi,van Duijnen Remon,Wong Stephan,Hamdioui Said

Publisher

IEEE

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. MNEMOSENE++: Scalable Multi-Tile Design with Enhanced Buffering and VGSOT-MRAM based Compute-in-Memory Crossbar Array;2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2023-12-04

2. Efficient Signed Arithmetic Multiplication on Memristor-Based Crossbar;IEEE Access;2023

3. Layer Sensitivity Aware CNN Quantization for Resource Constrained Edge Devices;2022 9th International Conference on Soft Computing & Machine Intelligence (ISCMI);2022-11-26

4. System Design for Computation-in-Memory: From Primitive to Complex Functions;2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC);2022-10-03

5. KrakenOnMem;Proceedings of the 36th ACM International Conference on Supercomputing;2022-06-28

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