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A Monolithic 3D Hybrid Architecture for Energy-Efficient Computation

  • Published:2018-10-01 Issue:4 Volume:4 Page:533-547
  • ISSN:2332-7766
  • Container-title:IEEE Transactions on Multi-Scale Computing Systems
  • language:
  • Short-container-title:IEEE Trans. Multi-Scale Comp. Syst.

Author:

Yu YeORCID,Jha Niraj K.ORCID

Funder

US National Science Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Hardware and Architecture,Information Systems,Control and Systems Engineering

Cited by 9 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Monolithic 3-D-Based Nonvolatile Associative Processor for High-Performance Energy-Efficient Computations;IEEE Journal on Exploratory Solid-State Computational Devices and Circuits;2024

2. Heterogeneous Manycore Architectures Enabled by Processing-in-Memory for Deep Learning: From CNNs to GNNs: (ICCAD Special Session Paper);2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD);2021-11-01

3. Impact of Temperature on Structure Deformation for Monolithic Inter-Tier vias In Monolithic 3D IC Packaging System;ECS Journal of Solid State Science and Technology;2021-11-01

4. AccuReD: High Accuracy Training of CNNs on ReRAM/GPU Heterogeneous 3-D Architecture;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2021-05

5. Monolithic 3D Integrated Circuits: Recent Trends and Future Prospects;IEEE Transactions on Circuits and Systems II: Express Briefs;2021-03
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