A Second-Order Passive Noise-Shaping SAR ADC With 4× Passive Gain and A Two-Input-Pair Comparator

Author:

Wang Hanyu1,Temes Gabor C.1

Affiliation:

1. Oregon State University,Corvallis,OR

Publisher

IEEE

Reference5 articles.

1. A Second-Order Noise-Shaping SAR ADC With Passive Integrator and Tri-Level Voting

2. A 0.029-mm2 17-fJ/Conversion-Step Third-Order CT ?? ADC With a Single OTA and Second-Order Noise-Shaping SAR Quantizer;liu;JSSC,2019

3. Fully passive third‐order noise shaping SAR ADC

4. A 40kHzBW 90dB-SNDR Noise-Shaping SAR with 4× Passive Gain and 2ndOrder Mismatch Error Shaping;liu;ISSCC,2020

5. 20.2 A 40MHz-BW 320MS/s Passive Noise-Shaping SAR ADC With Passive Signal-Residue Summation in 14nm FinFET

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1. A 97dB 10MS/s Fully-Differential Noise-Shaping Successive Approximation Analog-to-Digital Converter;2023 10th International Forum on Electrical Engineering and Automation (IFEEA);2023-11-03

2. A Low-Distortion Power-Efficient Feedforward Technique for DT Delta-Sigma ADCs;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21

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