A Computing-in-Memory SRAM Macro Based on Fully-Capacitive-Coupling With Hierarchical Capacity Attenuator for 4-b MAC Operation-Reference-Cited by-同舟云学术

A Computing-in-Memory SRAM Macro Based on Fully-Capacitive-Coupling With Hierarchical Capacity Attenuator for 4-b MAC Operation

Published:2022-05-28 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE International Symposium on Circuits and Systems (ISCAS)
language:
Short-container-title:

Author:

Xiao Kanglin¹,Cui Xiaoxin¹,Qiao Xin¹,Pan Nanbing¹,Wang Xin'An²,Wang Yuan¹

Affiliation:

1. Peking University,Key Laboratory of Microelectronic Devices and Circuits (MoE), School of Integrated Circuits,Beijing,China,100871

2. Peking University Shenzhen Graduate School,Key Laboratory of Integrated Microsystem, School of ECE,Shenzhen,China,518055

Funder

Research and Development

National Natural Science Foundation of China

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9937201/9937203/09937963.pdf?arnumber=9937963

Reference15 articles.

1. C3SRAM: An In-Memory-Computing SRAM Macro Based on Robust Capacitive Coupling Computing Mechanism

2. JFS2-4 Fully Row/Column-Parallel In-Memory Computing SRAM Macro Employing Capacitor-Based Mixed-Signal Computation with 5-b Inputs;lee;Symposium on VLSI Circuits Digest of Technical Papers,2021

3. 16.3 A 28nm 384kb 6T-SRAM Computation-in-Memory Macro with 8b Precision for AI Edge Chips

4. AND8T SRAM Macro with Improved Linearity for Multi-Bit In-Memory Computing

5. JFS2-2 PIMCA: A 3.4-Mb Programmable In-Memory Computing Accelerator in 28nm for On-Chip DNN Inference;yin;Symposium on VLSI Circuits Digest of Technical Papers,2021

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Capacitive Computing-In-Memory Circuit With Low Input Loading SRAM Bitcell and Adjustable ADC Input Range;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-09

2. A 28nm 32Kb SRAM Computing-in-Memory Macro With Hierarchical Capacity Attenuator and Input Sparsity-Optimized ADC for 4b Mac Operation;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-06