A 40nm Analog-Input ADC-Free Compute-in-Memory RRAM Macro with Pulse-Width Modulation between Sub-arrays-Reference-Cited by-同舟云学术

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A 40nm Analog-Input ADC-Free Compute-in-Memory RRAM Macro with Pulse-Width Modulation between Sub-arrays

Published:2022-06-12 Issue: Volume: Page:
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Container-title:2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits)
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Author:

Jiang Hongwu¹,Li Wantong¹,Huang Shanshi¹,Yu Shimeng¹

Affiliation:

1. Georgia Institute of Technology,Atlanta,GA,USA,30332

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9830116/9830138/09830211.pdf?arnumber=9830211

Reference7 articles.

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