Surround Gate Transistor With Epitaxially Grown Si Pillar and Simulation Study on Soft Error and Rowhammer Tolerance for DRAM-Reference-Cited by-同舟云学术

Surround Gate Transistor With Epitaxially Grown Si Pillar and Simulation Study on Soft Error and Rowhammer Tolerance for DRAM

Published:2021-02 Issue:2 Volume:68 Page:529-534
ISSN:0018-9383
Container-title:IEEE Transactions on Electron Devices
language:
Short-container-title:IEEE Trans. Electron Devices

Author:

Han Jin-Woo^ORCID,Kim Jungsik^ORCID,Beery Dafna,Bozdag K. Deniz,Cuevas Peter,Levi Amitay,Tain Irwin,Tran Khai,Walker Andrew J.^ORCID,Palayam Senthil Vadakupudhu^ORCID,Arreghini Antonio,Furnemont Arnaud,Meyyappan M.^ORCID

Funder

National Research Foundation of Korea (NRF) Grant Funded by the Korea Government

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx7/16/9332190/09314888.pdf?arnumber=9314888

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