A Novel Module-Sign Low-Power Implementation for the DLMS Adaptive Filter With Low Steady-State Error
Author:
Funder
Italian Ministry of University
ANIThiNG
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8919/9684154/09464790.pdf?arnumber=9464790
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Energy efficient enhanced all pass transformation fostered variable digital filter design based on approximate adder and approximate multiplier for eradicating sensor nodes noise;Analog Integrated Circuits and Signal Processing;2023-12-17
2. Novel Low-Power Floating-Point Divider With Linear Approximation and Minimum Mean Relative Error;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-12
3. Architectural Exploration for Energy-Efficient LMS and NLMS Adaptive Filters VLSI Design;2023 21st IEEE Interregional NEWCAS Conference (NEWCAS);2023-06-26
4. Design of Generalized Enhanced Static Segment Multiplier with Minimum Mean Square Error for Uniform and Nonuniform Input Distributions;Electronics;2023-01-15
5. A novel low-power DLMS adaptive filter with sign-magnitude learning and approximated FIR section;2022 17th Conference on Ph.D Research in Microelectronics and Electronics (PRIME);2022-06-12
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