Using Rotator Transformations to Simplify FFT Hardware Architectures

Author:

Andersson Rikard,Garrido MarioORCID

Funder

Spanish Ministry of Science, Innovation and Universities under the Ramón y Cajal

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 10 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Enabling Voltage Over-Scaling in Multiplierless DSP Architectures via Algorithm-Hardware Co-Design;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-02

2. Optimized 4-Parallel 1024-Point MSC FFT;IEEE Access;2024

3. Design of High-Speed Pipelined 1024Point Radix-2ˆ2 Fft Using Modified Input Scheduling Algorithm;2023 IEEE 20th India Council International Conference (INDICON);2023-12-14

4. A 5.2-GS/s 8-Parallel 1024-Point MDC FFT;2023 38th Conference on Design of Circuits and Integrated Systems (DCIS);2023-11-15

5. ACOR: On the Design of Energy-Efficient Autocorrelation for Emerging Edge Applications;2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD);2023-10-28

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