Ultra-Fast FPGA Implementation of Graph Cut Algorithm With Ripple Push and Early Termination-Reference-Cited by-同舟云学术

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Ultra-Fast FPGA Implementation of Graph Cut Algorithm With Ripple Push and Early Termination

Published:2022-04 Issue:4 Volume:69 Page:1532-1545
ISSN:1549-8328
Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
language:
Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Yan Guangyao¹^ORCID,Liu Xinzhe²^ORCID,Chen Fupeng²^ORCID,Wang Hui³,Ha Yajun²^ORCID

Affiliation:

1. Shanghai Advanced Research Institute, Chinese Academy of Sciences, Beijing, China

2. School of Information Science and Technology, ShanghaiTech University, Shanghai, China

3. School of Microelectronics, Shanghai Advanced Research Institute, Chinese Academy of Sciences, Beijing, China

Funder

Natural Science Foundation of China

Shanghai Science and Technology Commission Funding

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8919/9745276/09672705.pdf?arnumber=9672705

Reference46 articles.

1. ScalaBFS: A Scalable BFS Accelerator on FPGA-HBM Platform

2. A Hardware Pipeline with High Energy and Resource Efficiency for FMM Acceleration

3. An FPGA-Based Cloud System for Massive ECG Data Analysis

4. ChipNet: Real-Time LiDAR Processing for Drivable Region Segmentation on an FPGA

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Fast FPGA Accelerator of Graph Cut Algorithm with Out-of-order Parallel Execution in Folding Grid Architecture;2023 60th ACM/IEEE Design Automation Conference (DAC);2023-07-09

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