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Optimization Schemes for In-Memory Linear Regression Circuit With Memristor Arrays

  • Published:2021-12 Issue:12 Volume:68 Page:4900-4909
  • ISSN:1549-8328
  • Container-title:IEEE Transactions on Circuits and Systems I: Regular Papers
  • language:
  • Short-container-title:IEEE Trans. Circuits Syst. I

Author:

Wang Shiqing,Sun ZhongORCID,Liu YuhengORCID,Bao ShengyuORCID,Cai YimaoORCID,Ielmini DanieleORCID,Huang Ru

Funder

National Key Research and Development Program of China

National Natural Science Foundation of China

111 Project

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Extremely-Fast, Energy-Efficient Massive MIMO Precoding With Analog RRAM Matrix Computing;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-07

2. Energy-/Area-Efficient Spintronic ANN-based Digit Recognition via Progressive Modular Redundancy;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21

3. In-memory computing with emerging memory devices: Status and outlook;APL Machine Learning;2023-02-14

4. Modeling and Mitigating the Interconnect Resistance Issue in Analog RRAM Matrix Computing Circuits;IEEE Transactions on Circuits and Systems I: Regular Papers;2022-11

5. Invited Tutorial: Analog Matrix Computing With Crosspoint Resistive Memory Arrays;IEEE Transactions on Circuits and Systems II: Express Briefs;2022-07
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