In-memory computing with emerging memory devices: Status and outlook

Author:

Mannocci P.1ORCID,Farronato M.1ORCID,Lepri N.1ORCID,Cattaneo L.1ORCID,Glukhov A.1ORCID,Sun Z.2,Ielmini D.1ORCID

Affiliation:

1. Dipartimento di Elettronica, Informazione e Bioingegneria, Politecnico di Milano and IUNET 1 , Piazza L. da Vinci 32, 20133 Milano, Italy

2. Beijing Advanced Innovation Center for Integrated Circuits, School of Integrated Circuits, Institute for Artificial Intelligence, Peking University 2 , 100871 Beijing, China

Abstract

In-memory computing (IMC) has emerged as a new computing paradigm able to alleviate or suppress the memory bottleneck, which is the major concern for energy efficiency and latency in modern digital computing. While the IMC concept is simple and promising, the details of its implementation cover a broad range of problems and solutions, including various memory technologies, circuit topologies, and programming/processing algorithms. This Perspective aims at providing an orientation map across the wide topic of IMC. First, the memory technologies will be presented, including both conventional complementary metal-oxide-semiconductor-based and emerging resistive/memristive devices. Then, circuit architectures will be considered, describing their aim and application. Circuits include both popular crosspoint arrays and other more advanced structures, such as closed-loop memory arrays and ternary content-addressable memory. The same circuit might serve completely different applications, e.g., a crosspoint array can be used for accelerating matrix-vector multiplication for forward propagation in a neural network and outer product for backpropagation training. The different algorithms and memory properties to enable such diversification of circuit functions will be discussed. Finally, the main challenges and opportunities for IMC will be presented.

Funder

Horizon 2020 Framework Program

Publisher

AIP Publishing

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