Polyomino: A 3D-SRAM-Centric Accelerator for Randomly Pruned Matrix Multiplication With Simple Reordering Algorithm and Efficient Compression Format in 180-nm CMOS
Author:
Affiliation:
1. Graduate School of Engineering, The University of Tokyo, Tokyo, Japan
Funder
JST ACT-X
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Hardware and Architecture
Link
http://xplorestaging.ieee.org/ielx7/8919/10233917/10114064.pdf?arnumber=10114064
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5. GPUs and the Future of Parallel Computing
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