FPGA Synthesis of Ternary Memristor-CMOS Decoders for Active Matrix Microdisplays-Reference-Cited by-同舟云学术

FPGA Synthesis of Ternary Memristor-CMOS Decoders for Active Matrix Microdisplays

Author:

Wang Xiao-Yuan¹^ORCID,Wu Zhi-Ru¹,Zhou Peng-Fei¹,Iu Herbert Ho-Ching²^ORCID,Kang Sung-Mo³,Eshraghian Jason K.⁴^ORCID

Affiliation:

1. School of Electronics and Information, Hangzhou Dianzi University, Hangzhou, China

2. School of Electrical and Electronic Engineering, The University of Western Australia, Crawley, WA, Australia

3. Department of Electrical and Computer Engineering, University of California at Santa Cruz, Santa Cruz, CA, USA

4. Department of Electrical Engineering and Computer Science, University of Michigan, Ann Arbor, MI, USA

Funder

National Natural Science Foundation of China

Natural Science Foundation of Zhejiang Province

Fundamental Research Funds for the Provincial Universities of Zhejiang

UC Santa Cruz Faculty Research Award

Forrest Research Foundation under the Forrest Research Fellowship

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture

Link

Reference50 articles.

1. The generalized metastable switch memristor model;molter;Proc 15th Int Workshop Cellular Nanosc Netw Appl,2016

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

2. A gate‐tunable memristor emulator for motion detection;International Journal of Circuit Theory and Applications;2023-12-04