Dynamic Power Reduction in Huffman Design using 130 nm Technology Library
Author:
Affiliation:
1. General Authority for Dams and Reservoirs Ministry of Water Resources,Diyala,Iraq
2. Diyala Education Directorate, Ministry of Education,Diyala,Iraq
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9759539/9759415/09759786.pdf?arnumber=9759786
Reference22 articles.
1. Low Power Digital Design using Asynchronous Logic;jayasekar;Thesis submitted on San Jose State University,2011
2. A novel circuit topology for clock-gating-cell suitable for sub/near-threshold designs
3. Comparison of Hybrid Codes for MRI Brain Image Compression;soundarya;Engineering Technology & Applied Science Research Journal,2012
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2. Power Reduction using Pipeline-Clock Gating Technique in Synchronous Design with FPGA Implementation;2022 3rd Information Technology To Enhance e-learning and Other Application (IT-ELA);2022-12-27
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