Author:
Fieback Moritz,Nagarajan Surya,Bishnoi Rajendra,Tahoori Mehdi,Taouil Mottaqiallah,Hamdioui Said
Cited by
8 articles.
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1. A Dynamic Testing Scheme for Resistive-Based Computation-In-Memory Architectures;2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC);2024-01-22
2. Testing of Computing-In Memories: Faults, Test Algorithms, and Design-for-Testability;2023 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT);2023-10-03
3. Dependability of Future Edge-AI Processors: Pandora’s Box;2023 IEEE European Test Symposium (ETS);2023-05-22
4. Design and Test of Computing-In Memories;2022 19th International SoC Design Conference (ISOCC);2022-10-19
5. Dealing with Non-Idealities in Memristor Based Computation-In-Memory Designs;2022 IFIP/IEEE 30th International Conference on Very Large Scale Integration (VLSI-SoC);2022-10-03