Dominance of interface effects in SRO-SiO/sub 2/-SRO DEIS structures for EAROMs
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx1/16/385/00007367.pdf?arnumber=7367
Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. High power efficiency in Si-nc/SiO2 multilayer light emitting devices by bipolar direct tunneling;Applied Physics Letters;2009-06
2. Transport model in n/sup ++/-poly/SiO/sub x//SiO/sub 2//p-sub MOS capacitors for low-voltage nonvolatile memory applications;IEEE Transactions on Electron Devices;2000
3. A New Ultra Low Voltage Silicon-Rich-Oxide (SRO) NAND Cell;Japanese Journal of Applied Physics;1997-03-15
4. Enhanced tunneling characteristics of PECVD silicon-rich-oxide (SRO) for the application in low voltage flash EEPROM;IEEE Transactions on Electron Devices;1996
5. Comparing models for the growth of silicon-rich oxides (SRO);IEEE Transactions on Semiconductor Manufacturing;1996
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