Assessing the Vulnerability of Time-Controlled Logic-Loop-Based Circuits to Voltage Fault Injection and Power Monitoring Attacks
Author:
Affiliation:
1. The University of Tokyo,Graduate School of Engineering,Tokyo,Japan
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10332255/10332256/10332297.pdf?arnumber=10332297
Reference12 articles.
1. A 2.5–5.75-GHz Ring-Based Injection-Locked Clock Multiplier With Background-Calibrated Reference Frequency Doubler
2. A Low-Jitter Ring-Oscillator Phase-Locked Loop Using Feedforward Noise Cancellation With a Sub-Sampling Phase Detector
3. A 320-fs RMS Jitter and – 75-dBc Reference-Spur Ring-DCO-Based Digital PLL Using an Optimal-Threshold TDC
4. LOOPLock: Logic Optimization-Based Cyclic Logic Locking
5. Cyclic locking and memristor-based obfuscation against CycSAT and inside foundry attacks
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