A 2.4-GHz +25dBm P-1dB linear power amplifier with dynamic bias control in a 65-nm CMOS process-Reference-Cited by-同舟云学术

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A 2.4-GHz +25dBm P-1dB linear power amplifier with dynamic bias control in a 65-nm CMOS process

Published:2008-09 Issue: Volume: Page:
ISSN:
Container-title:ESSCIRC 2008 - 34th European Solid-State Circuits Conference
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Author:

Po-Chih Wang ,Kai-Yi Huang ,Yu-Fu Kuo ,Ming-Chong Huang ,Chao-Hua Lu ,Tzung-Ming Chen ,Chia-Jun Chang ,Ka-Un Chan ,Ta-Hsun Yeh ,Wen-Shan Wang ,Ying-Hsi Lin ,Chao-Cheng Lee

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/4669531/4681770/04681899.pdf?arnumber=4681899

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Nonlinear Three-Port Representation of PAs for Embedded Self-Calibration of Envelope-Dependent Dynamic Biasing Implementations;IEEE Access;2019

2. A Dual-Mode CMOS RF Power Amplifier With Integrated Tunable Matching Network;IEEE Transactions on Microwave Theory and Techniques;2012-01

3. Design challenges of a fully integrated 65 nm CMOS half cascode SFDS PA;Analog Integrated Circuits and Signal Processing;2011-08-28

4. Analysis and Optimization of Transformer-Based Series Power Combining for Reconfigurable Power Amplifiers;IEEE Transactions on Circuits and Systems I: Regular Papers;2011-01

5. Mobile Phone Transmitters for Wireless Standards: Systems, Architectures and Technologies;Reconfigurable RF Power Amplifiers on Silicon for Wireless Handsets;2010-12-02

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