Statistical bin limits-an approach to wafer disposition in IC fabrication-Reference-Cited by-同舟云学术

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Statistical bin limits-an approach to wafer disposition in IC fabrication

Published:1992 Issue:1 Volume:5 Page:59-61
ISSN:0894-6507
Container-title:IEEE Transactions on Semiconductor Manufacturing
language:
Short-container-title:IEEE Trans. Semicond. Manufact.

Author:

Illyes S.,Baglee D.A.G.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,Condensed Matter Physics,Electronic, Optical and Magnetic Materials

Link

http://xplorestaging.ieee.org/ielx3/66/3474/00121980.pdf?arnumber=121980

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Real-Time Detection Method For Wafer Probe Reference Die Shift;2023 China Semiconductor Technology International Conference (CSTIC);2023-06-26

2. An Ensembled Anomaly Detector for Wafer Fault Detection;Sensors;2021-08-13

3. Advanced Outlier Detection Using Unsupervised Learning for Screening Potential Customer Returns;2020 IEEE International Test Conference (ITC);2020-11-01

4. Predicting gate oxide reliability from statistical process control nodes in integrated circuit manufacturing — a case study;Quality and Reliability Engineering International;1997-09

5. Building‐in reliability ‐ implementation and benefits;International Journal of Quality & Reliability Management;1996-07-01

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