On Effective Through-Silicon Via Repair for 3-D-Stacked ICs

Author:

Jiang Li,Xu Qiang,Eklow Bill

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Cited by 51 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. TSV Built-In Self-Repair Architecture for Lifespan Reliability Enhancement of HBM;IEEE Transactions on Reliability;2024

2. Built-in Self-prevention (BISP) for runtime ageing effects of TSVs in 3D ICs;Integration;2024-01

3. Cluster-aware allocation of spare TSVs for enhanced reliability in 3D ICs;Microelectronics Reliability;2023-12

4. 3D-IC のテスト技術;Journal of The Japan Institute of Electronics Packaging;2023-11-01

5. TSV Built-In Self-Repair Architecture for Improving the Yield and Reliability of HBM;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-04

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