TSV Repair Architecture for Clustered Faults-Reference-Cited by-同舟云学术

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TSV Repair Architecture for Clustered Faults

Published:2019-01 Issue:1 Volume:38 Page:190-194
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Jang Jaewon,Cheong Minho^ORCID,Kang Sungho^ORCID

Funder

Ministry of Trade, Industry and Energy

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx7/43/8581521/08299466.pdf?arnumber=8299466

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Symmetrical Multilayer Dielectric Model of Thermal Stress and Strain of Silicon-Core Coaxial Through-Silicon Vias in 3-D Integrated Circuit;IEEE Transactions on Components, Packaging and Manufacturing Technology;2022-07

2. An Effective Coding Transmission Scheme for Defect-involved TSV Array Transmission;2021 IEEE 23rd Electronics Packaging Technology Conference (EPTC);2021-12-07

3. Combined Symbol Error Correction and Spare Through-Silicon Vias for 3D Memories;IEEE Transactions on Emerging Topics in Computing;2021-10-01

4. A N:1 Single-Channel TDMA Fault-Tolerant Technique for TSVs in 3D-ICs;2021 IEEE International Test Conference in Asia (ITC-Asia);2021-08-18

5. A Low-Cost, Robust and Tolerant, Digital Scheme for Post-Bond Testing and Diagnosis of TSVs;Journal of Electronic Testing;2021-04

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