A Full-Chip ESD Protection Circuit Simulation and Fast Dynamic Checking Method Using SPICE and ESD Behavior Models
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Link
https://ieeexplore.ieee.org/ielaam/43/8643655/8323231-aam.pdf
Cited by 16 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. On-chip ESD Protection Design Methodologies by CAD Simulation;ACM Transactions on Design Automation of Electronic Systems;2023-11-15
2. ESD Protection is About Circuit Design: Practices and Perspectives;2023 IEEE Asian Solid-State Circuits Conference (A-SSCC);2023-11-05
3. Effective ESD Design Through PERC Programming;2023 45th Annual EOS/ESD Symposium (EOS/ESD);2023-10-02
4. CAD-Based ESD Design Methodology is Critical to Emerging Technologies (Invited);2023 45th Annual EOS/ESD Symposium (EOS/ESD);2023-10-02
5. Graphene-Based ESD Protection for Future ICs;Nanomaterials;2023-04-20
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