NTUplace4dr: A Detailed-Routing-Driven Placer for Mixed-Size Circuit Designs With Technology and Region Constraints

Author:

Huang Chau-Chin,Lee Hsin-Ying,Lin Bo-Qiao,Yang Sheng-Wei,Chang Chin-Hao,Chen Szu-To,Chang Yao-WenORCID,Chen Tung-Chieh,Bustany Ismail

Funder

AnaGlobe, MediaTek, TSMC, MOST of Taiwan

NTU

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Cited by 42 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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2. RoutePlacer: An End-to-End Routability-Aware Placer with Graph Neural Network;Proceedings of the 30th ACM SIGKDD Conference on Knowledge Discovery and Data Mining;2024-08-24

3. Integrating Operations Research into Very Large-Scale Integrated Circuits Placement Design: A Review;Asia-Pacific Journal of Operational Research;2024-07-06

4. A P&R Co- Optimization Engine for Reducing Congestion;Proceedings of the Great Lakes Symposium on VLSI 2024;2024-06-12

5. Electrostatics-Based Analytical Global Placement for Timing Optimization;2024 Design, Automation & Test in Europe Conference & Exhibition (DATE);2024-03-25

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