A Structured Visual Approach to GALS Modeling and Verification of Communication Circuits
Author:
Funder
EPSRC
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Link
http://xplorestaging.ieee.org/ielx7/43/7931742/07572140.pdf?arnumber=7572140
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. Designing, Modelling and Analysis of GALS Software Systems;IEEE Transactions on Software Engineering;2023
2. High-level Modeling and Verification Platform for Elastic Circuits with Process Variation Considerations;ACM Journal on Emerging Technologies in Computing Systems;2022-10-13
3. Asynchronous Testing of Synchronous Components in GALS Systems;Lecture Notes in Computer Science;2019
4. A Compositional Approach for Verifying Protocols Running on On-Chip Networks;IEEE Transactions on Computers;2018-07-01
5. Formal micro-architectural analysis of on-chip ring networks;Proceedings of the 55th Annual Design Automation Conference;2018-06-24
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