OpenTimer v2: A New Parallel Incremental Timing Analysis Engine-Reference-Cited by-同舟云学术

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OpenTimer v2: A New Parallel Incremental Timing Analysis Engine

Published:2021-04 Issue:4 Volume:40 Page:776-789
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Huang Tsung-Wei^ORCID,Guo Guannan,Lin Chun-Xun,Wong Martin D. F.

Funder

NSF

Defense Advanced Research Projects Agency

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

https://ieeexplore.ieee.org/ielam/43/9381730/9134386-aam.pdf

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4. A Data-Driven, Congestion-Aware and Open-Source Timing-Driven FPGA Placer Accelerated by GPUs;2024 IEEE 32nd Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM);2024-05-05

5. Heterogeneous Static Timing Analysis with Advanced Delay Calculator;2024 Design, Automation & Test in Europe Conference & Exhibition (DATE);2024-03-25

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