The MUX-Based PUF Architecture for Hardware Security-Reference-Cited by-同舟云学术

The MUX-Based PUF Architecture for Hardware Security

Published:2021-12-23 Issue: Volume: Page:
ISSN:
Container-title:2021 International Conference on Circuits, Controls and Communications (CCUBE)
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Author:

Hatti Kaveri¹,Paramasivam C¹

Affiliation:

1. Amrita School of Engineering, Amrita Vishwa Vidyapeetham,Dept. of Electronics and Communication Engg.,Bengaluru,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9702710/9702711/09702737.pdf?arnumber=9702737

Reference20 articles.

1. FPGA based delay PUF implementation for security applications

2. Compact implementations of FPGA-based PUFs with en hanced performance;anandakumar;30th International Conference on VLSI Design and 2017 16th International Conference on Embedded Systems (VLSID),0

3. Novel technique to improve strength of weak arbiter PUF

4. LHPUF: Lightweight Hybrid PUF for Enhanced Security in Internet of Things

5. Delay based Physical Unclonable Function for Hardware Security and Trust

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1. Low-power High-speed Approximate Multiplier Design Using Compression Techniques;Micro-Electronics and Telecommunication Engineering;2023

2. A novel mixed-signal PUF based on Current Mirror Inverter;2022 IEEE International Symposium on Smart Electronic Systems (iSES);2022-12

3. Hardware Encryption logic on FPGA and Power Consumption;2022 29th International Conference on Systems, Signals and Image Processing (IWSSIP);2022-06-01

4. Boundary Scan Security Models using Cryptographic Primitives;2022 6th International Conference on Trends in Electronics and Informatics (ICOEI);2022-04-28