A 7.2-mW V-Band Frequency Doubler With 14% Total Efficiency in 130-nm SiGe BiCMOS
Author:
Affiliation:
1. IHP–Leibniz-Institut für Innovative Mikroelektronik, Frankfurt (Oder), Germany
Funder
Federal Ministry of Education and Research of Germany (BMBF) within the iCampus Cottbus Project
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Condensed Matter Physics
Link
http://xplorestaging.ieee.org/ielx7/7260/9789504/09689682.pdf?arnumber=9689682
Reference15 articles.
1. A Balunless Frequency Multiplier With Differential Output by Current Flow Manipulation
2. A $Ka$ -Band SiGe Bootstrapped Gilbert Frequency Doubler With 26.2% PAE
3. A 19.5% Efficiency 51–73-GHz High-Output Power Frequency Doubler in 65-nm CMOS
4. A Buffer-Less Wideband Frequency Doubler in 45-nm CMOS-SOI With Transistor Multiport Waveform Shaping Achieving 25% Drain Efficiency and 46–89 GHz Instantaneous Bandwidth
5. Design of an Ultra Compact Low Power 60 GHz Frequency Doubler in 22 nm FD-SOI
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2. A Frequency Doubler With Second Harmonic Feedback for Wideband, Efficient Frequency Multiplication at Millimeter-Wave;IEEE Transactions on Microwave Theory and Techniques;2024-05
3. Realization of mm-Wave MMIC Frequency Doubler for Astronomical Applications;IEEE Microwave and Wireless Technology Letters;2024-03
4. A Low-Power V-Band Radar Transceiver Front-End Chip Using 1.5 V Supply in 130-nm SiGe BiCMOS;IEEE Transactions on Microwave Theory and Techniques;2023-11
5. A V-Band Differential Push–Push Frequency Doubler With a Current-Reuse gm-Boosted Buffer;IEEE Microwave and Wireless Technology Letters;2023-03
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