Funder
COLCIENCIAS (Departamento Administrativo de Ciencia Tecnología e Innovación), Colombia
Centro de Microelectrónica de Barcelona (IMB-CNM-CSIC), Spain
Electrical and Electronics Engineering Department, University of los Andes
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Condensed Matter Physics
Cited by
1 articles.
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1. Layout Optimization of Integrated Inductors and Capacitors Using TGV Technology;IEEE Transactions on Components, Packaging and Manufacturing Technology;2024