An Efficient Electrical-Thermal Co-Design Methodology for Analysis of High-Speed PCB Interconnects-Reference-Cited by-同舟云学术

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An Efficient Electrical-Thermal Co-Design Methodology for Analysis of High-Speed PCB Interconnects

Published:2023-06-28 Issue: Volume: Page:
ISSN:
Container-title:2023 IEEE MTT-S International Conference on Numerical Electromagnetic and Multiphysics Modeling and Optimization (NEMO)
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Author:

Pathania Sunil¹,Kushwaha Suyash¹,Kumar Somesh²,Vasa Mallikarjun³,Shrivastava Ashish³,Kumar Vijender³,Mutnury Bhyrav³,Sharma Rohit¹

Affiliation:

1. Indian Institute of Technology Ropar,Department of Electrical Engineering,Rupnagar,India,140001

2. ABV-Indian Institute of Information Technology & Management,Department of Electrical and Electronics Engineering,Gwalior,India,474015

3. Dell Enterprise Server Group,Bangalore,India

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10202212/10202164/10202286.pdf?arnumber=10202286

Reference7 articles.

1. Influence of pin offset in PCB through-hole during wave soldering process: CFD modeling approach

2. An investigation of thermal enhancement on flip chip plastic BGA packages using CFD tool

3. Peak-Power-Aware Primary-Backup Technique for Efficient Fault-Tolerance in Multicore Embedded Systems

4. Thermal Sensitivity of Dielectric Materials in High-Speed Designs

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Deep Neural Network-Based Surrogate-Assisted Inverse Optimization for High-Speed Interconnects;IEEE Transactions on Electromagnetic Compatibility;2024

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