A Framework for Microarchitecture Traces as Abstraction Layer in Computer Architecture Education-Reference-Cited by-同舟云学术

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A Framework for Microarchitecture Traces as Abstraction Layer in Computer Architecture Education

Published:2021-06-17 Issue: Volume: Page:
ISSN:
Container-title:2021 ACM/IEEE Workshop on Computer Architecture Education (WCAE)
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Author:

Wallentowitz Stefan¹

Affiliation:

1. Munich University of Applied Sciences,Munich,Germany

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9707141/9707142/09707144.pdf?arnumber=9707144

Reference26 articles.

1. OpenPOWER Foundation;OpenPOWER Instruction Set Architecture,2021

2. WepSIM: An Online Interactive Educational Simulator Integrating Microdesign, Microprogramming, and Assembly Language Programming

3. gem5 and contributors;O3 Pipeline Viewer,2021

4. gem5 contributors;The gem5 Simulator,2021

5. WebRISC-V: A Web-Based Education-Oriented RISC-V Pipeline Simulation Environment;giorgi;Proceedings of the Workshop on Computer Architecture Education (Phoenix AZ USA) (WCAE’19),2019

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Practical Computer Architecture Education with RISC-V and TL-Verilog;2023 XXXII International Scientific Conference Electronics (ET);2023-09-13

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