Partitioning-Based Approach to Fast On-Chip Decoupling Capacitor Budgeting and Minimization-Reference-Cited by-同舟云学术

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Partitioning-Based Approach to Fast On-Chip Decoupling Capacitor Budgeting and Minimization

Published:2006-11 Issue:11 Volume:25 Page:2402-2412
ISSN:0278-0070
Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
language:
Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.

Author:

Li H.,Fan J.,Qi Z.,Tan S.X.-D.,Wu L.,Cai Y.,Hong X.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Link

http://xplorestaging.ieee.org/ielx5/43/36103/01715425.pdf?arnumber=1715425

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Decap Insertion With Local Cell Relocation Minimizing IR-Drop Violations and Routing DRVs;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-05

2. Decoupling Capacitor Insertion Minimizing IR-Drop Violations and Routing DRVs;Proceedings of the 28th Asia and South Pacific Design Automation Conference;2023-01-16

3. A Selected Inversion Approach for Locality Driven Vectorless Power Grid Verification;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2015-11

4. Distributed Generation Placement for Power Distribution Networks;Journal of Circuits, Systems and Computers;2014-11-10

5. Modeling and Tools for Power Supply Variations Analysis in Networks-on-Chip;IEEE Transactions on Computers;2014-03

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