Using Field-Repairable Control Logic to Correct Design Errors in Microprocessors

Author:

Wagner I.,Bertacco V.,Austin T.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software

Cited by 8 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Investigating the Feasibility of eFPGA-based Hardware Patching;2024 IEEE 30th International Symposium on On-Line Testing and Robust System Design (IOLTS);2024-07-03

2. Post Silicon Validation for I2C (SMBUS) Peripheral;2023 36th International Conference on VLSI Design and 2023 22nd International Conference on Embedded Systems (VLSID);2023-01

3. RemembERR: Leveraging Microprocessor Errata for Design Testing and Validation;2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO);2022-10

4. Performance counter based online pipeline bugs detection using machine learning techniques;Microprocessors and Microsystems;2021-07

5. Hardware Patching with Field-Repairable Control Logic;Post-Silicon and Runtime Verification for Modern Processors;2010-11-09

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