Design Tradeoffs in CXL-Based Memory Pools for Public Cloud Platforms-Reference-Cited by-同舟云学术

Design Tradeoffs in CXL-Based Memory Pools for Public Cloud Platforms

Published:2023-03-01 Issue:2 Volume:43 Page:30-38
ISSN:0272-1732
Container-title:IEEE Micro
language:
Short-container-title:IEEE Micro

Author:

Berger Daniel S.¹^ORCID,Ernst Daniel¹,Li Huaicheng²,Zardoshti Pantea¹,Shah Monish¹,Rajadnya Samir¹,Lee Scott¹,Hsu Lisa¹,Agarwal Ishwar³,Hill Mark D.¹,Bianchini Ricardo¹

Affiliation:

1. Microsoft Azure, Redmond, WA, USA

2. Virginia Tech, Blacksburg, VA, USA

3. Intel Corporation, Santa Clara, CA, USA

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Hardware and Architecture,Software

Link

http://xplorestaging.ieee.org/ielx7/40/10063988/10034802.pdf?arnumber=10034802

Reference20 articles.

1. Memory connectivity platform for CXL 1.1 and 2.0,2022

2. Intel resource director technology (Intel RDT),2015

3. CXL use-cases driving the need for low latency performance retimers,2021

4. AMD unveils workload-tailored innovations and products at the accelerated data center premiere;su,2021

5. Network requirements for resource disaggregation;peter;Proc 2th USENIX Conf Operating Syst Des Implementation,0

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