FGG: Feedback Guided Generation to Accelerate Functional Coverage Closure on Network-on-Chip Processors
Author:
Affiliation:
1. BITS-Pilani, Hyderabad Campus,Invecas Technologies Pvt. Ltd
2. BITS-Pilani, Hyderabad Campus
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10483275/10483296/10483462.pdf?arnumber=10483462
Reference15 articles.
1. Moore's law: past, present and future
2. A network on chip architecture and design methodology
3. A comprehensive evaluation of direct and indirect network-on-chip topologies;Baboli
4. Network on chip: An architecture for billion transistor era;Hemani
5. Design and coverage-driven verification of a novel network-interface IP macrocell for network-on-chip interconnects
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