Robust, Efficient Distributed Power Amplifier Achieving 96 Gbit/s With 10 dBm Average Output Power and 3.7% PAE in 22-nm FD-SOI

Author:

Celik UmutORCID,Reynaert PatrickORCID

Funder

Analog Devices, Limerick

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Compact Dual-mode CMOS Power Amplifier Covering both Sub-6GHz and mm-Wave Bands for 5G NR;2024 IEEE Radio Frequency Integrated Circuits Symposium (RFIC);2024-06-16

2. Ultrawideband Distributed Amplifier With Positive Feedback and Intrastack Coupling;IEEE Journal of Solid-State Circuits;2024

3. A Linear High-Efficiency Distributed Power Amplifier Utilizing Class-AB and Inverse-Class-C Complementary Structure;IEEE Transactions on Circuits and Systems I: Regular Papers;2024

4. A Compact 144% Fractional Bandwidth CMOS Power Amplifier With an Optimization of Synthesized High-Order Matching Network;2023 IEEE 15th International Conference on ASIC (ASICON);2023-10-24

5. A Fully-Differential Travelling-Wave Amplifier up to 110 GHz in a 22 nm FD-SOI CMOS Technology;2023 18th European Microwave Integrated Circuits Conference (EuMIC);2023-09-18

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