An Output Bandwidth Optimized 200-Gb/s PAM-4 100-Gb/s NRZ Transmitter With 5-Tap FFE in 28-nm CMOS
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/4/9664397/09538391.pdf?arnumber=9538391
Cited by 17 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
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2. A 100-Gb/s PAM-8 Transmitter With 3-Tap FFE and High-Swing Hybrid Driver in 40-nm CMOS Technology;IEEE Transactions on Circuits and Systems II: Express Briefs;2024-06
3. A 128Gb/s PAM-4 Transmitter with Edge-Boosting Pulse Generator and Pre-Emphasis Asymmetric Fractional-Spaced FFE in 28nm CMOS;2024 IEEE Custom Integrated Circuits Conference (CICC);2024-04-21
4. Performance-Driven Analog Layout Automation: Current Status and Future Directions (Invited Paper);2024 29th Asia and South Pacific Design Automation Conference (ASP-DAC);2024-01-22
5. An 80-Gb/s/pin Single-Ended Voltage-Mode PAM-4 Transmitter With a Pulsewidth Pre-Emphasis and a 4-Tap FFE in 28-nm CMOS;IEEE Journal of Solid-State Circuits;2024
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