A 5.6 μ A Wide Bandwidth, High Power Supply Rejection Linear Low-Dropout Regulator With 68 dB of PSR Up To 2 MHz-Reference-Cited by-同舟云学术

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A 5.6 μ A Wide Bandwidth, High Power Supply Rejection Linear Low-Dropout Regulator With 68 dB of PSR Up To 2 MHz

Published:2020-08 Issue:8 Volume:55 Page:2151-2160
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Joshi Kishan^ORCID,Manandhar Sanjeev,Bakkaloglu Bertan

Funder

Texas Instruments, Tucson, AZ 85711 USA

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/9146394/09036907.pdf?arnumber=9036907

Cited by 37 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A low dropout regulator design with 20.4 μA quiescent current and high power supply rejection;Integration;2024-11

2. A 0.91-μA-quiescent-current capacitor-less LDO with sub-threshold transient enhancement and bulk-driven feed-forward supply ripple cancellation;Microelectronics Journal;2024-09

3. High PSR capacitor‐less LDO with adaptive bulk‐driven feedforward technique;International Journal of Circuit Theory and Applications;2024-06-27

4. A Fast Transient PMOS LDO with AP³ Buffer and Shaped-Hybrid-Bias EA Techniques Achieving 8.15ps FOM;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

5. A Fast Transient Response Capless LDO Regulator Achieving -78 dB of PSR Up to 2 MHz;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

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