A Fast Transient PMOS LDO with AP3 Buffer and Shaped-Hybrid-Bias EA Techniques Achieving 8.15ps FOM
Author:
Affiliation:
1. State Key Laboratory of Electronic Thin Films and Integrated Devices, UESTC,Chengdu,China,610053
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10557746/10557828/10558628.pdf?arnumber=10558628
Reference12 articles.
1. A 1.24 $\mu$ A Quiescent Current NMOS Low Dropout Regulator With Integrated Low-Power Oscillator-Driven Charge-Pump and Switched-Capacitor Pole Tracking Compensation
2. An 11 mA Capacitor-Less LDO with 3.08 nA Quiescent Current and SSF-Based Adaptive Biasing
3. Multiple-Loop Design Technique for High-Performance Low-Dropout Regulator
4. An Output-Capacitor-Free Adaptively Biased Low-Dropout Regulator With Subthreshold Undershoot-Reduction for SoC
5. A High-Efficiency Fast-Transient LDO With Low-Impedance Transient-Current Enhanced Buffer
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