An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update
Author:
Affiliation:
1. Department of Electronic Engineering, Tsinghua University, Beijing, China
2. Department of Electrical Engineering, National Tsing Hua University, Hsinchu, Taiwan
3. Institute of Microelectronics, Chinese Academy of Sciences, Beijing, China
Funder
National Key Research and Development Program
NSFC
Beijing Nova Program
China Postdoctoral Science Foundation
Beijing National Research Center for Information Science and Technology
Beijing Innovation Center for Future Chip
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/4/4359912/10299656.pdf?arnumber=10299656
Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A 28-nm Floating-Point Computing-in-Memory Processor Using Intensive-CIM Sparse-Digital Architecture;IEEE Journal of Solid-State Circuits;2024-08
2. PICO-RAM: A PVT-Insensitive Analog Compute-In-Memory SRAM Macro With In Situ Multi-Bit Charge Computing and 6T Thin-Cell-Compatible Layout;IEEE Journal of Solid-State Circuits;2024
3. A “Digital+CIM” Processor Supporting Large-Scale NN Models;Springer Theses;2024
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