Cores, Cache, Content, and Characterization: IBM’s Second Generation 14-nm Product, z15

Author:

Wolpert DavidORCID,Berry ChristopherORCID,Bell Brian,Jatkowski Adam,Surprise Jesse,Isakson John,Geva Ofer,Deskin Brian,Cichanowski Mark,Hamid Dina,Cavitt Chris,Fredeman Gregory,Kannambadi Dinesh,Saporito AnthonyORCID,Mishra Ashutosh,Buyuktosunoglu AlperORCID,Webel TobiasORCID,Lobo Preetham,Bertran RamonORCID,Parashurama Pradeep BhadravatiORCID,Chidambarrao Dureseti,Bruen Brandon,Wagstaff Alan,Lukes EricORCID,Carey Sean,Shi Hunter,Romain MichaelORCID,Logsdon Paul,Agarwal IshitaORCID

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 7 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. BlitzCoin: Fully Decentralized Hardware Power Management for Accelerator-Rich SoCs;2024 ACM/IEEE 51st Annual International Symposium on Computer Architecture (ISCA);2024-06-29

2. Enterprise-Class Cache Compression Design;2024 IEEE International Symposium on High-Performance Computer Architecture (HPCA);2024-03-02

3. Ultra-Scaled E-Tree-Based SRAM Design and Optimization With Interconnect Focus;IEEE Transactions on Circuits and Systems I: Regular Papers;2024

4. Characterization and Exploration of Latch Checkers for Efficient RAS Protection;2023 53rd Annual IEEE/IFIP International Conference on Dependable Systems and Networks - Supplemental Volume (DSN-S);2023-06

5. Femtosecond-precision electronic clock distribution in CMOS chips by injecting frequency comb-extracted photocurrent pulses;Nature Communications;2023-04-24

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