Challenges and emerging solutions in testing TSV-based 2 1 over 2D- and 3D-stacked ICs-Reference-Cited by-同舟云学术

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Challenges and emerging solutions in testing TSV-based 2 1 over 2D- and 3D-stacked ICs

Published:2012-03 Issue: Volume: Page:
ISSN:
Container-title:2012 Design, Automation & Test in Europe Conference & Exhibition (DATE)
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Author:

Marinissen E. J.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/6171057/6176405/06176689.pdf?arnumber=6176689

Cited by 17 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. TREEHOUSE: A Secure Asset Management Infrastructure for Protecting 3DIC Designs;IEEE Transactions on Computers;2023-08-01

2. Analysis of the Security Vulnerabilities of 2.5-D and 3-D Integrated Circuits;2022 23rd International Symposium on Quality Electronic Design (ISQED);2022-04-06

3. 3-D IC: An Overview of Technologies, Design Methodology, and Test Strategies;Advances in Intelligent Systems and Computing;2020-11-24

4. Study on Estimation Method for Maximum Temperature of Multi-layered Micro-probe by Joule-Heating;International Journal of Precision Engineering and Manufacturing;2020-08-14

5. Comprehensive Analysis on Hardware Trojans in 3D ICs: Characterization and Experimental Impact Assessment;SN Computer Science;2020-07

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