Author:
Ito Kohei,Iizuka Kensuke,Hironaka Kazuei,Hu Yao,Koibuchi Michihiro,Amano Hideharu
Cited by
9 articles.
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1. Power Optimized Design Framework for FPGA Clusters;IPSJ Transactions on System and LSI Design Methodology;2024
2. Parallel Implementation of CNN on Multi-FPGA Cluster;IEICE Transactions on Information and Systems;2023-07-01
3. A Message Passing Interface Library for High-Level Synthesis on Multi-FPGA Systems;2022 IEEE 15th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC);2022-12
4. Multi-board FPGA Implementation to Solve the Satisfiability Problem for Multi-Agent Path Finding in Smart Factory;2022 Tenth International Symposium on Computing and Networking Workshops (CANDARW);2022-11
5. Optimizing Application Mapping for Multi-FPGA Systems with Multi-ejection STDM Switches;2022 32nd International Conference on Field-Programmable Logic and Applications (FPL);2022-08