A 20Gb/s Dual-Mode PAM4/NRZ Single-Ended Transmitter with RLM Compensation
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/8682239/8702066/08702456.pdf?arnumber=8702456
Cited by 12 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A 32-Gb/s Single-Ended PAM-4 Transceiver With Asymmetric Termination and Equalization Techniques for Next-Generation Memory Interfaces;IEEE Transactions on Circuits and Systems I: Regular Papers;2024
2. FPGA-Based Configurable and Highly Flexible PAM4 SerDes Simulation System;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-09
3. A 21-Gb/s PAM-3 Driver Using ZQ Calibration with Middle-Level Calibration to Improve Level Separation Mismatch Ratio;2023 International Technical Conference on Circuits/Systems, Computers, and Communications (ITC-CSCC);2023-06-25
4. A 16/32-Gb/s/pin Dual-Mode Single-Ended Transmitter with Pre-Emphasis FFE and RLM-Enhanced ZQ Calibration for Memory Interfaces;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21
5. A 16/32Gbps Dual-Mode SerDes Transmitter with Linearity Enhanced SST Driver;IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences;2022-11-01
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