Impact of coupling capacitance on read operation of RRAM devices in 1D1R crossbar architectures
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/6900043/6908326/06908583.pdf?arnumber=6908583
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A High-speed Low-power Sense Amplifier for the RRAM Array with Multi-level Reading Function using 130-nm Technology;2023 30th IEEE International Conference on Electronics, Circuits and Systems (ICECS);2023-12-04
2. Reliability-Aware Design Strategies for Stateful Logic-in-Memory Architectures;IEEE Transactions on Device and Materials Reliability;2020-06
3. Circuit Reliability Analysis of RRAM-based Logic-in-Memory Crossbar Architectures Including Line Parasitic Effects, Variability, and Random Telegraph Noise;2020 IEEE International Reliability Physics Symposium (IRPS);2020-04
4. Smart Logic-in-Memory Architecture for Low-Power Non-Von Neumann Computing;IEEE Journal of the Electron Devices Society;2020
5. Understanding the influence of device, circuit and environmental variations on real processing in memristive memory using Memristor Aided Logic;Microelectronics Journal;2019-04
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