Fabrication and Electrical Characterization of 3D Vertical Interconnects-Reference-Cited by-同舟云学术

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Fabrication and Electrical Characterization of 3D Vertical Interconnects

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Container-title:56th Electronic Components and Technology Conference 2006
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Author:

Newman M.W.,Muthukumar S.,Schuelein M.,Dambrauskas T.,Dunaway P.A.,Jordan J.M.,Kulkarni S.,Linde C.D.,Opheim T.A.,Stingel R.A.,Worwag W.,Topic L.A.,Swan J.M.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/10951/34490/01645676.pdf?arnumber=1645676

Cited by 18 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Nanostructural Analysis of CMOS-MEMS-Based Digital Microphone for Performance Optimization;IEEE Transactions on Nanotechnology;2016-11

2. Three-Dimensional Integration: A More Than Moore Technology;Lecture Notes in Electrical Engineering;2015

3. Characterization of the Proximity Effect From Tungsten TSVs on 130-nm CMOS Devices in 3-D ICs;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2014-09

4. Through silicon via filling methods with metal/polymer composite for three-dimensional LSI;Japanese Journal of Applied Physics;2014-05-12

5. Investigation of different methods for isolation in through silicon via for 3D integration;Microelectronic Engineering;2013-07

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