Low-power FIR digital filters using residue arithmetic-Reference-Cited by-同舟云学术

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Low-power FIR digital filters using residue arithmetic

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Container-title:Conference Record of the Thirty-First Asilomar Conference on Signals, Systems and Computers (Cat. No.97CB36136)
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Author:

Freking W.L.,Parhi K.K.

Publisher

IEEE Comput. Soc

Link

http://xplorestaging.ieee.org/ielx4/5559/14950/00680542.pdf?arnumber=680542

Cited by 4 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Evaluation of Mixed-Radix Digit Computation Techniques for the Three Moduli RNS {2 n −1, 2 n , 2 n+1−1};IEEE Transactions on Circuits and Systems II: Express Briefs;2021-04

2. Historical Patterns of Emerging Residue Number System Technologies During the Evolution of Computer Engineering and Digital Signal Processing;2018 IEEE International Symposium on Circuits and Systems (ISCAS);2018

3. Pipelined Two-Operand Modular Adders;Radioengineering;2015-04-15

4. Data-Driven Clock Gating for Digital Filters;Lecture Notes in Computer Science;2010

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