Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Cited by
14 articles.
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1. Coupling-Aware Functional Timing Analysis for Tighter Bounds;Proceedings of the on Great Lakes Symposium on VLSI 2017;2017-05-10
2. Static Timing Analysis;Electronic Design Automation for IC Implementation, Circuit Design, and Process Technology;2016-04-14
3. Path Delay Test Generation Toward Activation of Worst Case Coupling Effects;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2011-11
4. FA-STAC: An Algorithmic Framework for Fast and Accurate Coupling Aware Static Timing Analysis;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2011-03
5. Pessimism Reduction in Coupling-Aware Static Timing Analysis Using Timing and Logic Filtering;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2010-03