3-D Stacking of SiC Integrated Circuit Chips With Gold Wire Bonded Interconnects for Long-Duration High-Temperature Applications-Reference-Cited by-同舟云学术

3-D Stacking of SiC Integrated Circuit Chips With Gold Wire Bonded Interconnects for Long-Duration High-Temperature Applications

Published:2022-10 Issue:10 Volume:12 Page:1601-1608
ISSN:2156-3950
Container-title:IEEE Transactions on Components, Packaging and Manufacturing Technology
language:
Short-container-title:IEEE Trans. Compon., Packag. Manufact. Technol.

Author:

Li Feng¹^ORCID

Affiliation:

1. Department of Electrical and Computer Engineering, University of Idaho, Moscow, ID, USA

Funder

National Aeronautics and Space Administration Established Program to Stimulate Competitive Research

Micron Technology Foundation

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Industrial and Manufacturing Engineering,Electronic, Optical and Magnetic Materials

Link

Reference15 articles.

4. Gold-platinum alloys;darling;Platinum Met Rev,1962

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