1. Pattern Generation for Efficient Acceptability Verification of Approximate Circuits;2024 International VLSI Symposium on Technology, Systems and Applications (VLSI TSA);2024-04-22
2. FIFO Topology Aware Stalling for Accelerating Coverage Convergence of Stalling Regressions;2022 IEEE 40th VLSI Test Symposium (VTS);2022-04-25
3. RTL Regression Test Selection using Machine Learning;2022 27th Asia and South Pacific Design Automation Conference (ASP-DAC);2022-01-17
4. Path controllability analysis for high quality designs;Proceedings of the 24th Asia and South Pacific Design Automation Conference;2019-01-21
5. Scaling Input Stimulus Generation through Hybrid Static and Dynamic Analysis of RTL;ACM Transactions on Design Automation of Electronic Systems;2014-11-18